Intel admitted this week to a having a "highly parallel IA-based programmable architecture" codenamed Larrabee in its future but it was exceedingly coy with any tangible details like where it sits in the Intel roadmap.

But, know this, it's supposed to "include enhancement to accelerate applications" in scientific computing, recognition, mining, synthesis, visualization, financial analytics and health.

Intel did say it will be "easily programmable" - (that's because it's apparently using a version of the x86 instruction set to get around the fact that most people haven't mastered highly parallel programming) - and "scale to trillions of floating point operations per second (Teraflops) of performance," indicating that it's an everyman's version of that TeraScale 80-"tile" R&D project the company showed off recently with God knows what basic changes.

Larrabee is supposed to translate into really multi-core chips (think tens of cores) - how many evidently depending on what it's being used for - and significant threading.

Intel spokesman Bill Kircos called it "a combination of a variety of processors (some full IA, some just floating point, etc.) and other features, potentially graphics, etc. all on one 'many-core' chip."

The widgetry is out of research mode and into product planning, with Intel intending to demonstrate working silicon next year. No delivery dates, but people are thinking early '09.

The blogosphere has tried to demystify Larrabee for months and has pointed to it being Intel's answer to squished together CPUs and GPUs à la AMD-ATI, with Larrabee parceling out the graphics and CPU tasks among its many cores. The Inquirer has called in a "central graphics processor."

Well, Intel has multiple projects for that. Three weeks ago, it said some Nehalem chips will have an option for graphics on them...Nehalem comes after Penryn around 2008.

Larrabee is not Nehalem, it's its own architecture but also based on x86. The last time Intel created a new architecture we got EPIC.